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  ?2008 scillc. all rights reserved. publication order number: june 2008 ? rev. 2 amis 42675/d amis-42675 high speed low power can transceiver for long wire networks 1.0 general description the amis-42675 can transceiver is the interface between a contro ller area network (can) protocol controller and the physical bu s. it may be used in both 12v and 24v systems. the transceiver prov ides differential transmit capabi lity to the bus and differential receive capability to the can controller. the amis-42675 is the low power member of t he can high-speed transceiver family and o ffers the following additional features: ? ideal passive behaviour when supply voltage is removed ? wake-up over bus ? extremely low current standby mode due to the wide common-mode voltage range of the receiver inputs, the amis-42675 is able to reach outstanding levels of electro - magnetic susceptibility (ems). similarly, ex tremely low electromagnetic emission (eme) is achieved by the excellent matching of the output signals. the amis-42675 is the industrial version of the amis-42665 and pr imarily for applications where long network lengths are mandat ory. examples are elevators, in-building networks, process control and trains. to cope with the long bus delay the communication spe ed needs to be low. amis-42675 allows low transmit data rates down 10 kbit/s or lower. 2.0 key features ? compatible with the iso 11898 standard (iso 11898-2, iso 11898-5 and sae j2284) ? wide range of bus communication speed (0 up to 1 mbit/s) ? ideally suited for 12v and 24v i ndustrial and automotive applications ? allows low transmit data rate in networks exceeding 1 km ? extremely low current standby mode with wake-up via the bus ? low electromagnetic emission (eme): common-mode choke is no longer required ? differential receiver with wide common-mode range (+/- 35v) for high ems ? voltage source via v split pin for stabilizing the recessive bus level (further emc improvement) ? no disturbance of the bus lines with an un-powered node ? thermal protection ? bus pins protected against transients ? power down mode in which the transmitter is disabled ? bus and v split pins short circuit proof to supply voltage and ground ? logic level inputs compatible with 3.3v devices ? at least 110 nodes can be connected to the same bus
amis-42675 3.0 ordering information table 1: ordering information part number package shipping configuration temp. range amis42675icaa1g soic-8 green tube/tray -40c?125c AMIS42675ICAA1RG soic-8 green tape & reel -40c?125c 4.0 technical characteristics table 2: technical characteristics symbol parameter conditions min. max. unit v cc power supply voltage 4.75 5.25 v v stb dc voltage at pin stb -0.3 v cc v v txd dc voltage at pin txd -0.3 v cc v v rxd dc voltage at pin rxd -0.3 v cc v v canh dc voltage at pin canh 0 < v cc < 5.25v; no time limit -35 +35 v v canl dc voltage at pin canl 0 < v cc < 5.25v; no time limit -35 +35 v v split dc voltage at pin v split 0 < v cc < 5.25v; no time limit -35 +35 v v o(dif)(bus_dom) differential bus output voltage in dominant state 42.5 < r lt < 60 1.5 3 v cm-range input common-mode range for comparator guaranteed differential receiver threshold and leakage current -35 +35 v v cm-peak common-mode peak note -500 500 mv c load load capacitance on ic outputs 15 pf t pd(rec-dom) propagation delay txd to rxd see figure 5 70 230 ns t pd(dom-rec) propagation delay txd to rxd see figure 5 100 245 ns v cm-step common-mode step note -150 150 mv t junc junction temperature -40 150 c note: the parameters v cm-peak and v cm-step guarantee low eme. rev. 2 | page 2 of 14 | www.onsemi.com
amis-42675 5.0 block diagram figure 1: block diagram v split mode & wake -up control wake - up filter amis- 42675 stb gnd rxd v cc 2 3 7 6 comp comp 5 vcc txd 1 driver control thermal shutdown vcc 8 4 v split vcc pc20071005.2 por canh canl rev. 2 | page 3 of 14 | www.onsemi.com
amis-42675 6.0 typical application 6.1 application schematic figure 2: application diagram 6.2 pin description figure 3: pin configuration amis- 42675 canh canl gnd rxd txd v split 2 1 3 45 6 7 8 pc20071005.3 v cc stb can controller vbat 5v-reg in out can bus v cc gnd 47 nf 60 60 5 6 7 8 1 2 3 4 txd rxd v split gnd canl canh v cc amis- 42675 stb table 3: pin out pin name description 1 txd transmit data input; low input => dom inant driver; internal pull-up current 2 gnd ground 3 v cc supply voltage 4 rxd receive data output; dominant transmitter => low output 5 v split common-mode stabilization output 6 canl low-level can bus line (low in dominant mode) 7 canh high-level can bus line (high in dominant mode) 8 stb stand-by mode control input rev. 2 | page 4 of 14 | www.onsemi.com
amis-42675 7.0 functional description 7.1 operating modes amis-42675 provides two modes of operation as illustrated in table 4 . these modes are selectable through pin stb. table 4: operating modes pin rxd mode pin stb low high normal low bus dominant bus recessive standby high wake-up request detected no wake-up request detected 7.1.1. normal mode in the normal mode, the transceiver is able to communicate via the bus lines. the signals are transmitted and received to the c an controller via the pins txd and rxd. the slopes on the bus lines outputs are optimized to give extremely low eme. 7.1.2. stand-by mode in stand-by mode both the transmitter and receiver are disabled and a very low-power differential receiver monitors the bus lin es for can bus activity. the bus lines are terminated to ground and supply current is reduced to a minimum, typically 10a. when a wak e-up request is detected by the low-power differential receiver, the si gnal is first filtered and then verified as a valid wake sign al after a time period of t bus , the rxd pin is driven low by the transceiver to inform the controller of the wake-up request. 7.2 split circuit the v split pin is operational only in normal mode. in standby mode this pin is floating. the v split is connected as shown in figure 2 and its purpose is to provide a stab ilized dc voltage of 0.5 x v cc to the bus avoiding possible steps in the common-mode signal therefore reducing eme. these unwanted steps could be caused by an un-powered node on the network with excessive leakage current from the bus that shifts the recessive vo ltage from its nominal 0.5 x v cc voltage. 7.3 wake-up once a valid wake-up (dominant state longer than t bus ) has been received during the standby mode, the rxd pin is driven low. 7.4 over-temperature detection a thermal protection circuit protects the ic from damage by switching off the transmitter if the junction temperature exceeds a value of approximately 160c. because the transmitter di ssipates most of the power, the power di ssipation and temperature of the ic is reduced. all other ic functions continue to operate. the transmitter off-state resets wh en pin txd goes high. the thermal prote ction circuit is particularly needed when a bus line short circuits. 7.5 high communication speed range the transceiver is primarily intended for in dustrial applications. it allows very low baud rates needed for long bus length app lications. but also high speed communication is possible up to 1mbit/s. 7.6 fail safe features a current-limiting circuit protects the tr ansmitter output stage from damage caused by a ccidental short circuit to either posit ive or negative supply voltage, although power dissipat ion increases during this fault condition. the pins canh and canl are protec ted from automotive electrical transients (according to iso 7637; see figure 4 ). pins txd and stb are pulled high internally should the input become disconnected. pins txd, stb and rxd will be floating, preventing revers e supply should the v cc supply be removed. rev. 2 | page 5 of 14 | www.onsemi.com
amis-42675 8.0 electrical characteristics 8.1 definitions all voltages are referenced to gnd (pin 2). positive currents fl ow into the ic. sinking current means the current is flowing in to the pin; sourcing current means the current is flowing out of the pin. 8.2 absolute maximum ratings stresses above those listed in the following table may cause permanent device failure. exposure to absolute maximum ratings for extended periods may affect device reliability. table 5: absolute maximum ratings symbol parameter conditions min. max. unit v cc supply voltage -0.3 +7 v v canh dc voltage at pin canh 0 < v cc < 5.25v; no time limit -50 +50 v v canl dc voltage at pin canl 0 < v cc < 5.25v; no time limit -50 +50 v v split dc voltage at pin vsplit 0 < v cc < 5.25v; no time limit -50 +50 v v txd dc voltage at pin txd -0.3 v cc + 0.3 v v rxd dc voltage at pin rxd -0.3 v cc + 0.3 v v stb dc voltage at pin stb -0.3 v cc + 0.3 v v tran(canh) transient voltage at pin canh note 1 -300 +300 v v tran(canl) transient voltage at pin canl note 1 -300 +300 v v tran(vsplit) transient voltage at pin vsplit note 1 -300 +300 v v esd( electrostatic discharge volt age at all pins note 2 note 4 -5 -750 +5 +750 kv v latch-up static latch-up at all pins note 3 120 ma t stg storage temperature -55 +150 c t amb ambient temperature -40 +125 c t junc maximum junction temperature -40 +170 c notes: 1) applied transient waveforms in accordance with is o 7637 part 3, test pulses 1, 2, 3a, and 3b (see figure 4 ). 2) standardized human body model electrostatic discharge (esd) pulses in accordance to mil883 method 3015.7. 3) static latch-up immunity: static latch-up prot ection level when tested according to eia/jesd78. 4) standardized charged device model esd pulses when tested according to eos/esd ds5.3-1993. 8.3 thermal characteristics table 6: thermal characteristics symbol parameter conditions value unit r th(vj-a) thermal resistance from junction to am bient in so8 package in free air 145 k/w r th(vj-s) thermal resistance from juncti on to substrate of bare die in free air 45 k/w rev. 2 | page 6 of 14 | www.onsemi.com
amis-42675 8.4 characteristics v cc = 4.75 to 5.25v; t junc = -40 to +150c; r lt =60 ? unless specified otherwise. table 7: characteristics symbol parameter conditions min. typ. max. unit supply (pin v cc ) i cc supply current dominant; v txd = 0v recessive; v txd = v cc 45 4 65 8 ma ma i ccs supply current in standby mode t junc,max = 100c 10 15 a transmitter data input (pin txd) v ih high-level input voltage output recessive 2.0 - v cc + 0.3 v v il low-level input voltage output dominant -0.3 - +0.8 v i ih high-level input current v txd = v cc -5 0 +5 a i il low-level input current v txd = 0v -75 -200 -350 a c i input capacitance not tested - 5 10 pf transmitter mode select (pin stb) v ih high-level input voltage standby mode 2.0 - v cc + 0.3 v v il low-level input voltage normal mode -0.3 - +0.8 v i ih high-level input current v stb = v cc -5 0 +5 a i il low-level input current v stb = 0v -1 -4 -10 a c i input capacitance not tested - 5 10 pf receiver data output (pin rxd) v oh high-level output voltage i rxd = -10ma 0.6 x v cc 0.75 x v cc v v ol low-level output voltage i rxd = 5ma 0.25 0.45 v i oh high-level output current v o = 0.7 x v cc -5 -10 -15 ma i ol low-level output current v o = 0.3 x v cc 5 10 15 ma bus lines (pins canh and canl) v o(reces) (norm) recessive bus voltage v txd = v cc ; no load normal mode 2.0 2.5 3.0 v v o(reces) (stby) recessive bus voltage v txd = v cc ; no load standby mode -100 0 100 mv i o(reces) (canh) recessive output current at pin canh -35v < v canh < +35v; 0v amis-42675 table 8: characteristics (continued) symbol parameter conditions min. typ. max. unit common-mode stabilization (pin v split ) v split reference output voltage at pin v split normal mode; -500a < i split < 500a 0.3 x v cc - 0.7 x v cc i split(i) v split leakage current stand-by mode -5 +5 a i split(lim) v split limitation current normal mode -3 +3 ma power-on-reset (por) porl por level canh, canl, v ref in tri- state below por level 2.2 3.5 4.7 v thermal shutdown t j(sd) shutdown junction temperature 150 160 180 c timing characteristics (see figure 4 and figure 5 ) t d(txd-buson) delay txd to bus active c l = 100pf between canh to canl 40 85 105 ns t d(txd-busoff) delay txd to bus inactive c l = 100pf between canh to canl 30 60 105 ns t d(buson-rxd) delay bus active to rxd c rxd = 15pf 25 55 105 ns t d(busoff-rxd) delay bus inactive to rxd c rxd = 15pf 40 100 105 ns t pd(rec-dom) propagation delay txd to rxd from recessive to dominant c l = 100pf between canh to canl 90 230 ns t d(dom-rec) propagation delay txd to rxd from dominant to recessive c l = 100pf between canh to canl 90 245 ns t d(stb-nm) delay standby mode to normal mode 5 7.5 10 s t dbus dominant time for wake-up via bus 0.75 2.5 5 s 8.5 measurement set-ups and definitions figure 4: test circuit for transients amis- 42675 v cc gnd 2 3 canh canl v split 5 6 7 pc20071006.1 stb 8 rxd 4 txd 1 1 nf 100 nf +5 v 20 pf 1 nf transient generator rev. 2 | page 8 of 14 | www.onsemi.com
amis-42675 figure 5: hysteresis of the receiver figure 6: test circuit for timing characteristics v rxd v i(dif)(hys) high low 0,5 0,9 pc20040829.7 hysteresis amis- 42675 v cc gnd 2 3 canh canl v split 5 6 7 r lt c lt pc20071006.2 stb 8 rxd 4 txd 1 60 100 pf 100 nf +5 v 20 pf rev. 2 | page 9 of 14 | www.onsemi.com
amis-42675 figure 7: timing diagram for ac characteristics figure 8: basic test set-up for eme 10 nf amis- 42675 v cc gnd 2 3 canh canl v split 5 6 7 pc20071006.3 stb 8 rxd 4 txd 1 30 active probe 100 nf +5 v 20 pf generator 30 6.2 k 47 nf 6.2 k spectrum anayzer canh canl txd rxd dominant 0,9v 0,5v recessive 0,7 x v cc v i(dif) = v canh - v canl t d(txd-buson) t d(buson-rxd) t pd(rec-dom) t d(txd-busoff) t d(busoff-rxd) t pd(dom-rec) pc20040829.6 0,3 x v cc high low rev. 2 | page 10 of 14 | www.onsemi.com
amis-42675 figure 9: eme measurements rev. 2 | page 11 of 14 | www.onsemi.com
amis-42675 9.0 package outline soic-8: plastic small outline; 8 leads; body width 150mil. on semiconductor reference: soic150 8 150 g rev. 2 | page 12 of 14 | www.onsemi.com
amis-42675 10.0 soldering 10.1 introduction to solder ing surface mount packages this text gives a very brief insight to a complex technology. a more in-depth account of soldering ics can be found in the on semiconductor ?data handbook ic26; integrated circuit packages? (d ocument order number 9398 652 90011). there is no soldering method that is ideal for all surface mount ic packages. wave soldering is not always suitable for surface mount ics, or for pri nted- circuit boards (pcbs) with high population densities. in these situations re-flo w soldering is often used. 10.2 re-flow soldering re-flow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the pc b by screen printing, stencilling or pressure-syringe dispensing before package placement. several methods exist for re-flowing; for example, infrared/convection heating in a conveyor type oven. throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. typical re-flow peak temperatures range from 215 to 250c. the top-surface temperature of the packages should preferably be kept below 230c. 10.3 wave soldering conventional single wave soldering is not recommended for surface mount devices (smds) or pcbs with a high component density, a s solder bridging and non-wetting can present major problems. to overcome these problems the double-wave soldering method was specifically developed. if wave soldering is used the following conditions must be observed for optimal results: ? use a double-wave soldering method comprising a turbulent wave with high upward pressure follow ed by a smooth laminar wave. ? for packages with leads on two sides and a pitch (e): ? larger than or equal to 1.27mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the pcb; ? smaller than 1.27mm, the footprint longitudinal axis must be parallel to the transport direction of the pcb. the footprint must incorporate solder thieves at the downstream end. ? for packages with leads on four sides, the footprint must be placed at a 45o angle to the transport direction of the pcb. the footprint must incorporate solder thieves downstream and at the side corners. during placement and before soldering, the package must be fixed with a droplet of adhesive. the adhesive can be applied by scr een printing, pin transfer or syringe dispensing. the package can be soldered after the adhesive is cured. typical dwell time is fo ur seconds at 250c. a mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. 10.4 manual soldering fix the component by first soldering two diagonally-opposite end leads. use a low voltage (24v or less) soldering iron applied to the flat part of the lead. contact time must be limited to 10 seconds at up to 300c. when using a dedicated tool, all other leads can be soldered in one operation within two to five seconds between 270 and 320c. table 9: soldering method soldering method package wave re-flow (1) bga, sqfp not suitable suitable hlqfp, hsqfp, hsop, htssop, sms not suitable (2) suitable plcc (3) , so, soj suitable suitable lqfp, qfp, tqfp not recommended (3)(4) suitable ssop, tssop, vso not recommended (5) suitable notes: 1. all surface mount (smd) packages are mo isture sensitive. depending upon the moistu re content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package crac ks may occur due to vaporization of the moisture in them (the so called popcorn effect). for details, refer to the drypack information in the data handbook ic26; integrated circuit pa ckages; section: packing methods. 2. these packages are not suitable for wave soldering as a solder joint between the pcb and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. if wave soldering is considered, then the package must be pl aced at a 45 angle to the solder wave direction. the package f ootprint must incorporate solder thieves downstream and at the side corners. 4. wave soldering is only suitable for lqfp, tqfp and qfp package s with a pitch (e) equal to or larger than 0.8mm; it is defin itely not suitable for packages with a pitch (e) equal to or smaller than 0.65mm. 5. wave soldering is only suitable for ssop and tssop packages with a pitch (e) equal to or larger than 0.65mm; it is definite ly not suitable for packages with a pitch (e) equal to or smaller than 0.5mm. rev. 2 | page 13 of 14 | www.onsemi.com
rev. 2 | page 14 of 14 | www.onsemi.com amis-42675 11.0 revision history revision date modification 1.0 october 2007 initial release 2.0 june 2008 move content into on semiconduct or template; update opn table 12.0 company or product inquiries for more information about on semiconductor?s products or services visit our web site at http://onsemi.com . on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes witho ut further notice to any products herein. scil lc makes no warranty, representati on or guarantee regarding the suitability of its products for any parti cular purpose, nor does scillc assume any liability arising out of the application or use of any pr oduct or circuit, and specifica lly disclaims any and all li ability, including without li mitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actu al performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surg ical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers , employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information literature fulfillment: literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone: 303-675-2175 or 800-344-3860 toll free usa/canada fax: 303-675-2176 or 800-3 -3867 toll free usa/canada 44 email: orderlit@onsemi.com n. american technical support: 800-282-9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81-3-5773-3850 on semiconductor website: www.onsemi.com order literature: http://www.onsemi.com/orderlit for additional information, please contact your local sales representative


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